What is the use of AXI protocol?
The AXI protocol defines the signals and timing of the point-to-point connections between manager and subordinates. Note: The AXI protocol is a point-to-point specification, not a bus specification. Therefore, it describes only the signals and timing between interfaces.
How many channels are there in AXI protocol?
five channels
The AXI protocol defines five channels: three for write signals, and two for read signals.
What is AXI protocol transaction?
The AXI protocol enables out-of-order transaction completion. It gives an ID tag to every transaction across the interface. The protocol requires that transactions with the same ID tag are completed in order, but transactions with different ID tags can be completed out of order.
What is AXI interconnect?
The AXI Interconnect IP connects one or more AXI memory-mapped Master devices to one or more memory-mapped Slave devices. The AXI interfaces conform to the AMBA® AXI version 4 specifications from ARM®, including the AXI4-Lite control register interface subset.
What is burst transfer in AXI?
The AXI protocol is burst-based. The master begins each burst by driving control information and the address of the first byte in the transaction to the slave. As the burst progresses, the slave must calculate the addresses of subsequent transfers in the burst. A burst must not cross a 4KB address boundary.
How does AXI interconnect work?
The AXI is a point to point interconnect that designed for high performance, high speed microcontroller systems. The AXI protocol is based on a point to point interconnect to avoid bus sharing and therefore allow higher bandwidth and lower latency. AXI is arguably the most popular of all AMBA interface interconnect.
What is point-to-point interconnect in AXI?
What is AXI burst size?
AXI3 supports burst lengths of 1 to 16 transfers, for all burst types. AXI4 extends burst length support for the INCR burst type to 1 to 256 transfers. Support for all other burst types in AXI4 remains at 1 to 16 transfers.
What is 1kb boundary in AHB?
1 kilobyte is the smallest area an AHB slave may occupy in the memory map. Therefore,if a burst did cross a 1 kilobyte boundary, the access could start accessing one slave at the beginning of the burst and then switch to another on the boundary, which must not happen for the above reason.
What is aligned and unaligned address in AXI?
32 bit value two lower address bits need to be zero to be aligned. A 32 bit value at 0x1000 is aligned but 0x1001, 0x1002, 0x1003 would all be unaligned. Memories are generally not 8 bits wide from an interface perspective as well as a geometry, depends on what kind of memory or where.